TODOs

Posted on Fri 12 July 2024 in MUPS16

Fixes

Either RAM should ignore all read/write requests when reset is low or I need fix the decode card to not drive memory control lines during reset. Currently RAM read/writes as the memory control ROM is shifted (same problem as on MMU)
fix the bad silk screen on the ALU (missing labels on almost all the LEDs), and clean up the BOM
add pull-down resistors to the A and B buses on one of the control unit cards (possibly PC/IMM? It's got space).
change the pull-up resistors for the regoutX and regrd lines to pull-down ones (the safe states for these are 0b00000 and 0b00 respectively - all 1s actually means either output or set the flg register).

in future, provide an easy way to generate any microcode address from the tester board, to make it easier to verify the contents of the control RAM. This applies to the ramcsX lines, too. It might be as simple as making the reset unit let rst_state_data get pulled high after reset finishes, rather than driving it high.
expose the full contents of IR to the test board. Even if the extra five bits can't go on the backplane, at least put them on a pin header.
in future, provide a test pad for GND and VCC for debugging (I was using the ones for the register or ALU boards, but they're covered now)
remove the outputs to the B bus for both pc and flg registers, as we never use these (it's impossible to address these in normal instructions, as they're system registers, and there's no encoding in the regoutb lines that allows us to force output from them). Note that this applies to all system registers, so we could also clean up a lot of the register board at some point